\section{Conclusion}\label{sec:conclusion}

With the unique properties such as high density, low-power,
good-scalability, and non-volatility, the emerging memristor-based
Resistive RAM (ReRAM) is regarded as one of the most promising memory
technologies. One of the key reliability challenges for memristor-based
ReRAM design is the log-normal distribution of the switching time, which
causes the occurrence of undesired error after the write operation. In
this paper, we have studied the switching time distribution of the
memristor-based ReRAM, and proposed to relaxing the cell BER by ECC code
to improve the write energy and latency of both the MOS based and
cross-point based memristor ReRAM design. The experimental results
indicated that the proposed design can improve the write latency by up to
70\% and reduce the write energy by up to 60\%.
